Knowledge gaps
I have been working with FPGAs for just about 10 years now. And I just realized that I have never done a CDC FIFO. Well... Maybe back in uni as some paper exercise.
It's such a weird gap too. Since it's like the first answer anyone gives whenever you want to transfer a lot of data across clock domains. But I just haven't needed a hardware FIFO for that yet.
So I spent the afternoon implementing one from scratch and shoving every edge case I could think of at it. Just as a learning exercise.
Have you found any weird gaps in your own knowledge?