r/FPGA • u/EonOst FPGA Developer • 1d ago
diff vs single end high speed ports (microcoax)
I have been thinking if a single end high speed tranceiver port on the high end FPGA's would be more practical than diff port now that microcoax and connectors are commonly available.
I guess the advantage of diff signaling is not that great if you have access to proper shielded microcoax cables. And diff at these speeds does not travel well on standard PCB stacks.
If you look at the wiring inside laptops, the diff >5.4Gbps lanes travel in diff mode through separate length matched microcoax wires, and I am thinking maybe that is a waste of one wire all the way from source to sink. They do send Wifi RF signals through single end so why not high speed on FPGA ports?
What are your thoughts about the topic?
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u/TheSilentSuit 1d ago
Wifi RF at single end? Are you talking about the antennae? They have very specific characteristics. Also, it is analog in nature. You can't compare RF signaling to digital signaling in the way you are.
Even with proper shielding, noise can still get it. And noise impacts the max throughput you can get.
There are a ton of electrical reasons why you use differential in high speed serial signaling. Noise rejection, decoupling sender/receiver, etc. If there was a way to remove a wire, it would be done. That's real dollars at scale of electronics being made/sold. In short, if it was a viable solution, companies would do it because that's a lot of BOM cost reduction.
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u/Mateorabi 1d ago
Differential isn’t just for off board. On the PCB too. Single ended all return currents are in the gnd/pwr plane. They return to the die via shared gnd/power pins. You have co-inductance with other i/o.
Good chip packaging will sprinkle enough gnd pins around to mitigate. But not always.
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u/Luigi_Boy_96 FPGA Developer 1d ago
I think the antenna comparison misses the point. The OP is asking about digital SerDes lanes over micro-coax, not analog RF. You couldn't do it on the high-speed transceivers anyway. GTH/GTY-style transceivers are differential in silicon: the driver, the receiver front end (CTLE/DFE) and the common-mode handling all assume a pair. There is no single-ended mode.
Even if there were, differential would still win. You get roughly twice the swing for the same supply, much better rejection of common-mode noise and ground bounce, and lower EMI and crosstalk. Micro-coax doesn't change that, because the shield is the return path, so any ground offset between boards or noise on the shield goes straight into the signal. Laptops use differential micro-coax because the endpoints (eDP, PCIe, USB) are differential, and a converter at each end would cost more than the wire you save. Wi-Fi RF is narrowband and designed around a 50 Ω reference from the start, which isn't comparable to a 10+ Gbps data lane.
RFSoCs do have analog inputs, but those are usually fed differentially through a balun as well.
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u/EonOst FPGA Developer 1d ago
Twice the swing at the cost of twice the wiring.. I am not sure if that compares well to "RF", wich at this use is very similar to high speed AC connected digital signalling. Imagine how much data you can move through an antenna with some modulation. You would do better with direct RF connection between devices.
But yea, I get that the internal driver and receiver ports of the die are diff (at both ends) and the die carrier are designed to "silently" carry diff onto the balls. I would think you could do similar to single end.
Forwarding single end out to the PCB through balls potentially has some weak links where diff works better. But if they are short for their wavelength, I would think its ok. For single end you could do very low cost connection near the package edge, where the diff pairs are already placed today.
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u/Luigi_Boy_96 FPGA Developer 1d ago
You can technically use one leg of a differential driver, and people do it on the bench: put one leg into a 50 Ω scope channel and terminate the other. But that’s pseudo-differential, and you pay for it. You lose half the swing, the unused leg still needs a proper termination, and the driver’s current draw is no longer constant, so you push more switching noise into the supply. On the receive side, the CTLE/DFE and the common-mode handling still assume a pair, so you’d be giving up the noise rejection the input was built around.
The package is designed around differential too. The balls, the substrate routing and the return current paths through the neighbouring ground balls are all set up for a coupled pair at around 100 Ω. A lone 50 Ω single-ended escape with nothing guaranteeing its return path is a different structure.
On “short for their wavelength”: at 10+ Gbps the edges are tens of picoseconds, which is only a few millimetres of travel. Vias, balls and connector launches are exactly that size, so they are not electrically short. They are the dominant source of reflections and mode conversion.
The RF comparison is also not quite apples to apples. RF is narrowband and sits on a carrier, with matched mixers and a defined 50 Ω reference at both ends. A baseband NRZ or PAM4 lane is broadband from near DC to well above the Nyquist frequency, and it has to survive loss and reflections across that whole range without any carrier or channel selection to help it.
So the wire saving is real, but you pay for it in swing, noise margin and ground sensitivity, and you’d need new silicon to do it properly.
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u/NoSuchKotH 1d ago
You would do better with direct RF connection between devices.
The complexity of an RF receiver or transmitter is many times higher than that of a digital receiver or transmitter. Even if you include signal conditioning/equalizing and SERDES. Not to mention that you need and RF capable silicon process to build these RF components on chip, which adds significant cost, even if the silicon area would be the same.
While you wrote above that you did "10Ghz" routing, it does not seem like that you did care much about what is going on electrically, both on the wire and in silicon.... Maybe you should remedy this problem. While you don't like people pointing you at books, there is a lot of things you need to learn in order to understand high speed signaling. It is not something that can be conveyed in a reddit comment. There is no free lunch when it comes to learning complex topics. And no, AI wont save you either.
BTW: We do not talk about "GHz" but "Gbit/s" when we talk about digital signals. Because the RF bandwidth is not important for digital signals. It's the ability to detect the bits proberly, which depends on the eye pattern, which in turn depends more on the dispersion experienced by the signal than the bandwidth limit of the transmission medium (at least for properly designed wires/cables). Also, keep in mind that the signal bandwidth of digital signals is many times higher than its bit rate. A 10Gbit/s signal has frequency components up there in the 50-100GHz range.
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u/EonOst FPGA Developer 1d ago
The Ghz/Gbps was a mental glitch. I am aware of the difference. But I think a 1Gbps signal will work fine at 2GHz bandwidth. The 8b10b encoding makes sure there is a limit to number of equal bits in a row, wich kinda defines the lower bandwidth limit. Maybe that limit is greater on more bit encodings like 64b66b, but I never saw lower band limitations as a problem on coax.
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u/sssredit 1d ago edited 1d ago
The thing with serdes vs RF is that every cycle as to be accurate and in spec to the eye diagram in serdes. The Fourier series of the serdes signal covers a huge bandwidth, so bandwidth is important. Trace memory effect are huge impactors. Electrically you have to recover the clock this needs a PLL or DLL along with huge number of complexities vs RF.
In RF there are a lot of modulation shifts allowed and filtered and many cycles to detect a symbol. RF applications are also bandwidth limited unless your working on something like instrumentation.
I work in both these domains. So I do not agree with a statement that RF is more difficult. Each have their challenges.
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u/gerhardt_von_goll 1d ago
A diff pair provides its own return path, and in SI, the return path is crucial.
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u/EonOst FPGA Developer 1d ago
The microcoax has full shield for return paths. There is a reason this works for Ghz RF antenna connections. The shielded wire is not the antenna, its just bringing the signal out to the antenna.
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u/gerhardt_von_goll 1d ago
Yes, but with a single-ended signal, the shield is common ground; it is filthy with noise from the rest of the system.
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u/NoSuchKotH 1d ago
If you think that the advantage of differential is not needing shielding and that single ended can do the same, if properly shielded, then you do have a huge misunderstanding what high speed signaling is actually fighting against.
Read the two excellent books "High-speed digital design - a handbook of black magic" and "High-speed signal propagation - advanced black magic" by Johnson and Graham.